Boron Doped Epi
In-Situ Doped Epitaxy is the epitaxial growth process where dopant gases are introduced simultaneously with silicon or silicon-germanium precursors during source/drain or channel growth — allowing precisely controlled, electrically active dopant profiles to be incorporated directly into the epitaxial film without requiring a subsequent ion implantation step. In-situ doped epi enables dopant concentrations above solid solubility limits, abrupt junction profiles, and eliminates implant-induced crystal damage in the active device region.
Why In-Situ Doping Is Preferred
- Traditional approach: Grow epi → then implant dopant into epi → anneal → activation.
- Problem: Implant damages the epi crystal → increased defects → higher junction leakage.
- In-situ solution: Dopants incorporated during growth → substitutionally placed → no damage → immediate activation → low junction leakage.
- Benefit: Abrupt junction profiles achievable with epi thickness control (1–2 nm precision) rather than implant straggle.
Common Doped Epi Systems
| Epi System | Dopant | Application | Dopant Gas |
|---|---|---|---|
| Si:B (Boron-doped Si) | B | PMOS S/D (planar) | B₂H₆ (diborane) |
| SiGe:B | B | PMOS FinFET/GAA S/D | B₂H₆ + GeH₄ |
| Si:P (Phosphorus-doped Si) | P | NMOS S/D | PH₃ (phosphine) |
| Si:As | As | NMOS contact layer | AsH₃ (arsine) |
| SiGe:C:B | B, C | PMOS — C suppresses B diffusion | B₂H₆ + CH₃SiH₃ |
| SiGe:P | P | NMOS — high-mobility Ge:P | PH₃ |
Dopant Incorporation Mechanism
- Dopant molecules (e.g., B₂H₆) decompose on the Si surface during CVD growth.
- B atoms incorporate substitutionally at Si lattice sites → electrically active immediately.
- Maximum active concentration: Exceeds solid solubility when grown by low-temperature epi (≤600°C) — kinetically frozen.
- Typical peak concentrations: B in SiGe: 3–5 × 10²⁰ cm⁻³; P in Si: 2–4 × 10²¹ cm⁻³.
Carbon in SiGe:C:B (B-Diffusion Suppression)
- Boron diffuses rapidly in SiGe during subsequent high-T steps → junction moves deeper → PMOS short-channel degraded.
- Adding C (0.5–1.5% atomic) to SiGe reduces B diffusivity 10–100× by trapping vacancies.
- SiGe:C:B epi: Compressive strain (from Ge) enhances hole mobility + C pins boron in place.
- Used in SiGe HBT base layers for precise base doping control.
Selective vs. Blanket Epi
- Selective epitaxy: Growth only on exposed Si surfaces (S/D regions) — no growth on SiO₂ or SiN.
- Selectivity achieved by: HCl in growth gas (etches SiGe nuclei on oxide before they can grow).
- Critical for S/D epi in FinFET/GAA: Must grow SiGe:B (PMOS) or Si:P (NMOS) only in recessed S/D trenches.
FinFET S/D Epi Process
1. S/D recess etch: Remove Si fin in S/D regions (~10–20 nm deep)
2. Pre-clean: HF-last clean to remove native oxide from Si surfaces
3. Epi load into CVD reactor (reduced pressure, 550–650°C)
4. Selective SiGe:B growth (PMOS) or Si:P growth (NMOS)
5. Multiple epi layers: Buffer + doped layer + cap (optimize shape and doping profile)
6. Merge between adjacent fins → creates continuous S/D region
7. No implant needed → clean crystal, abrupt junctionMetrology for Doped Epi
- SIMS: Measures dopant concentration vs. depth — verifies peak dopant level and junction depth.
- SRP (Spreading Resistance Profile): Electrical measurement of carrier concentration vs. depth.
- TEM/EDX: Verifies Ge% and layer structure.
- Rs (sheet resistance): Monitors activation and dopant incorporation uniformity.
In-situ doped epitaxy is the clean, crystallographically perfect alternative to implanting dopants into active device regions — by incorporating electrically active B and P during crystal growth rather than by damage-inducing ion bombardment, in-situ epi delivers the high carrier concentrations, abrupt junctions, and low defect densities that make PMOS and NMOS source-drain contacts at 5nm and below meet their drive current and reliability targets.