CMP-Aware Routing

CMP-aware routing is a physical design technique that considers Chemical Mechanical Planarization (CMP) effects during wire routing — adjusting layout choices to minimize CMP-induced thickness variation that can degrade circuit performance and reliability.

Why CMP Awareness Matters

• CMP polishes wafer surfaces flat, but the removal rate depends on local pattern density:
• High-Density Regions: More metal area → higher effective hardness → less removal → metal remains thicker.
• Low-Density Regions: Less metal area → softer → more removal → metal becomes thinner.
• This creates thickness variation across the die — affecting:
• Wire Resistance: Thinner wires have higher resistance → slower signal propagation.
• Capacitance: Metal thickness affects both plate and fringe capacitance.
• Via Reliability: If metal is too thin at via locations, contact resistance increases.
• Planarity: Poor planarity affects subsequent lithographic focus.

CMP Effects

• Dishing: The metal inside a wide feature is polished below the surrounding dielectric — creating a concave surface. Affects wide power stripes most.
• Erosion: In dense metal arrays, the dielectric between features is over-polished — the entire region sinks below the nominal surface. Affects dense routing regions.
• Step Height: Residual topography carries forward to subsequent layers — accumulated step height can exceed lithographic depth of focus.

CMP-Aware Routing Strategies

• Density Equalization: Route wires to achieve uniform metal density across the die — avoid large region-to-region density contrasts.
• Fill-Aware Routing: Consider where fill shapes will be inserted and route to leave room for effective fill placement.
• Wire Width Management: Avoid excessively wide wires where possible — break wide buses into multiple narrower wires to reduce dishing.
• Slotting: Insert slots (openings) in wide metal features to reduce effective width and minimize dishing.
• Via Placement: Place vias in regions with predictable, consistent metal thickness — avoid placing critical vias in high-dishing areas.

CMP Models in EDA Tools

• Density-Based Models: Predict CMP removal as a function of local pattern density. Fast, used during routing.
• Pattern-Density Maps: The router maintains a density map and adjusts routing to keep density within target range.
• Post-CMP Simulation: After routing, simulate the CMP process to predict final topography and verify that thickness variations are within tolerance.
• Extraction: CMP-aware parasitic extraction accounts for actual (non-nominal) metal thickness when calculating R and C.

CMP-aware routing is essential for timing accuracy at advanced nodes — ignoring CMP effects can lead to 10–20% errors in wire resistance estimation, causing unexpected timing failures.