Copper Anneal

Copper anneal is a deliberate thermal treatment applied to freshly-electroplated copper interconnect, before planarization, specifically to grow its crystal grains larger — trading the fine, disordered microstructure copper naturally has right after plating for a coarser, more stable one that conducts better and resists long-term degradation far more effectively.

Freshly electroplated copper is, structurally, a mess compared to what the interconnect eventually needs it to become. Electroplating deposits copper atoms quickly, and the resulting film forms with tiny crystal grains — often only tens of nanometers across — packed together in a metastable arrangement that isn't the copper's true, lowest-energy structure. This fine-grained state has measurably higher electrical resistivity than copper can achieve, because electrons scatter every time they cross a grain boundary, and a film with many small grains packed into the same wire cross-section simply has far more boundaries for electrons to scatter off.

Annealing heats the copper enough to let its atoms rearrange into a lower-energy, coarser-grained structure, and that structural change is the entire point of the step. Held at a moderate temperature — typically well under the copper's melting point, in an inert or hydrogen-containing atmosphere to prevent oxidation — the as-plated film's small grains merge and grow, driven by the same thermodynamic tendency that makes any metastable fine-grained metal want to coarsen given enough thermal energy and time. The resulting grains can end up tens of times larger than the as-plated structure, directly reducing the density of grain boundaries available to scatter electrons, which is why annealed copper interconnect conducts noticeably better than as-plated copper ever could.

This grain growth happens to some degree even without a deliberate anneal step, which is exactly why controlled annealing exists as a distinct, engineered process rather than something left to chance. As-plated copper is inherently unstable enough that it continues coarsening slowly at room temperature over hours to days after plating — a phenomenon called self-annealing. Relying on this uncontrolled, slow process alone would leave grain structure (and therefore resistivity) varying depending on exactly how much time passed before the next process step, which is unacceptable for a manufacturing process that needs consistent, predictable electrical properties. A deliberate, controlled anneal step completes this grain growth quickly and uniformly, rather than leaving the film's final microstructure to depend on incidental timing.

Grain structure after anneal directly affects chemical-mechanical polishing behavior, which is a second, independent reason this step matters beyond resistivity alone. CMP removes excess copper down to a flat, planar surface, and a film with uneven or still-coarsening grain structure polishes unevenly, contributing to defects like dishing (excess material removed from wide copper features) or scratching. A uniformly annealed film with stable, fully-grown grains polishes far more predictably, which is part of why the anneal step is positioned specifically before CMP in the process flow rather than afterward.

Large, bamboo-like grain structure also directly improves electromigration resistance, giving copper anneal a reliability benefit on top of its resistivity and planarization benefits. Electromigration — the gradual displacement of metal atoms under high current density — travels fastest along grain boundaries, which act as easy diffusion paths for atoms being pushed by electron momentum transfer. A fine-grained film offers many interconnected grain boundary paths for this migration to exploit; a coarse-grained, "bamboo" structure (where grains span the full width of a narrow wire, leaving few or no continuous grain-boundary paths along the wire's length) starves electromigration of the easy diffusion route it depends on. This is a major reason copper anneal is treated as a reliability-critical process step rather than purely an electrical-performance optimization.