Electromigration Reliability
Electromigration is the diffusion-controlled transport of metal atoms driven by momentum exchange with conducting electrons. At the current densities carried by on-chip interconnect — routinely above $10^{6}\ \text{A/cm}^{2}$, a level that would vaporise a macroscopic wire — that momentum transfer is large enough to displace lattice atoms over a product lifetime, opening voids that fail a line and growing hillocks that short neighbouring ones.
The driving force
An atom in a current-carrying conductor feels two electrostatic contributions: the direct field acting on its ionic charge, and the far larger "electron wind" from scattering carriers. Both are collected into an effective valence $Z^{*}$, giving
For copper $Z^{*}$ is negative and of order unity to ten, meaning the wind term dominates and atoms migrate toward the anode, in the direction of electron flow. The resulting atomic flux follows the Nernst-Einstein relation
so lifetime is exponentially sensitive to temperature and linearly sensitive to current density through the flux, before any statistics are applied.
Flux divergence, not flux, causes failure
Uniform atomic flux moves mass without changing local density and damages nothing. Damage requires divergence: a location where more atoms leave than arrive, or the reverse. Mass conservation gives
Divergence sites are structural, which is why electromigration is a layout problem as much as a materials problem. The classic sites are a via transition where copper meets a refractory liner that blocks diffusion, a sharp change in line width, a grain-boundary triple point, and any interface where the dominant diffusion path terminates.
Which diffusion path dominates
Copper offers several transport routes in parallel, and the fastest one sets the lifetime. Their activation energies differ enough that the measured $E_a$ identifies the failing interface directly.
| Path | $E_a$ (eV) | Comment |
|---|---|---|
| Cu / dielectric cap surface | 0.8 – 1.0 | dominant in unclad damascene Cu |
| Grain boundary | 1.0 – 1.2 | matters in fine-grained narrow lines |
| Cu / metal liner interface | 1.2 – 1.5 | Co or Ru cladding suppresses surface path |
| Bulk lattice | ≈ 2.1 | never rate-limiting at use temperature |
The practical consequence is that the top surface of a damascene copper line is the weak point, and selective cobalt or ruthenium capping — which replaces the fast Cu/SiN surface path with a slow Cu/metal interface — buys more electromigration margin than any amount of width increase.
Back-stress and the immortality criterion
Accumulating atoms put the anode into compression and deplete the cathode into tension, and that stress gradient drives a counter-flux. When it cancels the wind exactly, transport stops. The balance yields the Blech threshold product
Segments below the threshold are immortal regardless of current density, which removes a large fraction of short local wires from the electromigration budget entirely.
Lifetime projection
Accelerated stress data is fitted to Black's equation and extrapolated to use conditions:
with $n \to 1$ for void-growth-limited and $n \to 2$ for nucleation-limited kinetics. Because failure times are lognormal, sign-off targets a small failure fraction rather than the median, and the usable lifetime sits several standard deviations below $t_{50}$.
Design and sign-off practice
EM checking extracts per-segment RMS and average current from dynamic simulation, since void growth responds to average electron flux while self-heating responds to RMS. Each segment is tested against a current-density limit derated for temperature, then exempted if it satisfies the Blech criterion. Power grids and clock trees dominate the violation list because they carry unidirectional current; bidirectional signal nets benefit from partial damage healing on current reversal and carry a relaxed limit. Self-heating couples back into the Arrhenius term, so a line that passes at nominal temperature can fail once $\Delta T_{\text{Joule}} \propto j^{2}\rho R_{\text{th}}$ is included — a common source of late-stage sign-off surprises.
Electromigration is ultimately a constraint on current density, geometry and interface quality simultaneously, and it is the reason advanced-node interconnect development is dominated by liner, cap and grain-structure engineering rather than by simple dimensional scaling.