Embedded Die Process Substrate
Embedded Die in Substrate enables direct integration of semiconductor dies within organic substrate using blind via interconnection, eliminating need for separate package and reducing interconnect parasitic resistance.
Via-in-Die Concept:
- Blind vias: laser-drilled vias from substrate surface reaching die pads (sub-surface)
- Via-in-die vias: penetrate die substrate (requires special die preparation)
- Direct connectivity: minimal parasitic resistance vs wirebond/BGA
- High current capability: direct path ideal for power applications
Die Embedding Substrate Options:
- Coreless substrate: no fiber-glass core, pure resin material for embedding
- Cored substrate: FR-4 glass-fiber core with resin, die embedded within
- Die cavity: controlled depression for die placement
- Resin fill: hermetic encapsulation around die
Process Flow (Build-Up Layer Technology):
- Core preparation: (if cored) or resin foundation (if coreless)
- Die placement: adhesive positioning in cavity
- Via drilling: laser punch blind vias to die pads
- Via metallization: Cu plating into blind vias
- Lamination cycles: layer-by-layer buildup (dielectric + conductive layers)
- Final processing: outer layer RDL, solder pads
Via Density and Pitch:
- Blind via diameter: 50-150 µm typical (laser drilling limitation)
- Via pitch: 200-300 µm conservative (tighter spacing possible)
- Via density: 100-200 vias per die typical
- Interconnect bandwidth: improved vs wirebond (lower inductance)
Infineon Embedded Power Technology:
- Target applications: power management, integrated power stages
- Die embedding into substrate layer directly
- Reduces thermal path: embedded die improves heat dissipation
- Advanced version: active substrate (passive components, impedance matching)
Reliability Considerations:
- Thermal cycling: embedded die experiences stress from substrate CTE mismatch
- Moisture absorption: organic substrate absorbs water, creating swelling stress
- Pad cratering: mechanical failure at die edge if stress too high
- Mitigation: underfill, controlled resin chemistry, process optimization
Application Sweet Spots:
- Power management ICs: POL (point-of-load) converters
- RF modules: embedded filters, matching networks
- Analog modules: embedded reference circuits
- Cost-sensitive: volume justifies process development
Advantages vs Other Technologies:
- vs wirebond: higher density, lower inductance
- vs BGA: no substrate needed, shorter interconnect
- vs flip-chip: potentially lower cost for low-current applications
Embedded die represents mid-cost, high-density solution for power/analog applications requiring superior thermal/electrical performance relative to traditional wirebond/BGA packages.