Power amplifier (PA) is an electronic circuit that increases the power level of an RF or audio signal — converting DC supply power into output signal power. PAs are defined by the transistor technology, biasing class, matching networks, and the fundamental efficiency-linearity trade-off.
Operating classes determine where the transistor is biased on its I-V curve. Class A (conduction angle 360°) is the most linear but least efficient (~50%); Class AB (180-360°) balances linearity and efficiency; Class B (180°) reaches ~78% theoretical efficiency; Class C (< 180°) is highly efficient but nonlinear. Switched-mode classes (D, E, F) can exceed 90% efficiency but require complex harmonic tuning.
Key specifications: Power Added Efficiency (PAE = (Pout-Pin)/PDC) measures how well DC power converts to RF; P1dB is the output power where gain compresses by 1 dB; IP3 (third-order intercept) quantifies intermodulation distortion; Error Vector Magnitude (EVM) measures signal fidelity for modulated waveforms.
Technologies: GaN HEMT dominates high-power (>10W) applications due to high breakdown voltage and electron velocity. GaAs pHEMT leads in high-frequency (>10 GHz) mobile and millimeter-wave. LDMOS silicon handles high-power cellular base stations. SiGe BiCMOS enables highly integrated mmWave arrays.
Linearization is critical for modern wideband modulation (5G NR, 802.11ax). Digital Pre-Distortion (DPD) is the industry standard — a lookup table or polynomial model pre-warps the input to compensate for the PA's AM-AM and AM-PM transfer characteristics, enabling Class-AB efficiency with Class-A linearity.
AI/ML context: AI is transforming PA design through neural-network behavioral models (replacing slow SPICE simulations), reinforcement-learning DPD, and automatic load-pull optimization. For AI chip systems, high-speed wireless interconnects (future mmWave NVLink) will require integrated GaN PAs; autonomous vehicle radar ASICs embed SiGe PA arrays alongside neural network inference engines.
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