Jitter
Jitter is the timing uncertainty of a signal edge relative to its ideal position. In a digital or mixed-signal system, that uncertainty matters because it shrinks eye opening, reduces timing margin, and can turn a clean waveform into a marginal one. Jitter is one of the core problems of signal integrity because it is not just about voltage; it is about when the voltage arrives.
There are several ways to think about jitter. Period jitter describes the variation of an edge from cycle to cycle. Cycle-to-cycle jitter captures the difference between adjacent periods. Total jitter combines random and deterministic effects and is often what matters when you ask whether a link will pass a receiver threshold. In practice, a designer wants to know the jitter budget, the source of the error, and the path to reduce it.
Jitter usually comes from a mix of noise sources. PLL phase noise, crosstalk, power-supply ripple, reference noise, and intersymbol interference can all contribute. In high-speed links, even a small amount of jitter can produce a large bit-error penalty, so it is often treated as a first-order design constraint alongside loss and reflection.
| Jitter type | What it measures | Why it matters |
|---|---|---|
| Period jitter | Variation in each clock period | Impacts timing margin directly |
| Cycle-to-cycle jitter | Difference between adjacent periods | Exposes short-term instability |
| Total jitter | Combined random and deterministic error | Sets real-world link robustness |
For a real channel or clock network, jitter is usually evaluated with eye diagrams, timing histograms, and phase-noise plots so the team can see whether the implementation is robust or just barely passing.