Level Shifter

Level Shifter is a circuit that translates signals between voltage domains operating at different supply voltages — required wherever data crosses power domain boundaries in modern low-power SoC designs with multiple voltage islands.

Why Level Shifters Are Needed

  • Multi-VDD design: Different blocks run at different voltages for power savings.
  • Core logic: 0.7V (minimum leakage).
  • Memory interface: 1.1V (performance).
  • IO: 1.8V or 3.3V.
  • Without level shifter: 0.7V logic signal might not fully turn on a 1.1V device → functional failure.

Level Shifter Types

Low-to-High (LH) Level Shifter:
- Most common: 0.7V → 1.1V.
- Uses cross-coupled PMOS pair to restore full VDD_high swing.
- Requires both VDD_low and VDD_high supplies.

High-to-Low (HL) Level Shifter:
- 1.1V → 0.7V — simpler: Standard inverter in lower domain.
- No special cell needed in many cases.

Bidirectional Level Shifter:
- Used on bidirectional buses (GPIO, I2C, SPI).

Enable-Based Level Shifter:
- Has scan enable input for testability.

Isolation Cell

  • When a power domain is shut off (power gating), its outputs are unknown (X or float).
  • Isolation cells clamp output to 0 or 1 when domain is off — prevents X-propagation.
  • AND-isolation: Output = Signal AND ISO_ENABLE. When ISO_ENABLE=0, output clamped to 0.
  • OR-isolation: Output = Signal OR ISO_ENABLE. When ISO_ENABLE=1, output clamped to 1.
  • Powered by always-on supply.

Always-On (AO) Cell

  • Cells in the power-gated domain that must remain powered even when domain is off.
  • Powered by always-on supply (VDD_AO).
  • Examples: Retention flip-flops (save state before power-off), isolation cells.

Power Management Sequence

1. Assert isolation enable (clamp outputs).
2. Save retention flip-flop states.
3. Gate power switch (MTCMOS header/footer off).
4. [Domain is off]
5. Un-gate power switch.
6. Restore retention flip-flop states.
7. De-assert isolation enable.

Level shifters and isolation cells are the interface circuitry that makes multi-voltage SoC design functional and safe — without them, voltage domain crossings would cause random functional failures and floating outputs that corrupt system state.

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