Non-Default Rules (Ndr)

Non-Default Rules (NDR) are custom design rules applied to specific critical nets that require more stringent routing specifications than the standard default rules used for general signal routing — providing enhanced signal integrity, timing control, and reliability for the most important nets on the chip.

Why NDR Is Needed

• Default routing rules (minimum width, minimum spacing) are optimized for maximum density — packing as many wires as possible into available routing space.
• Some nets need better quality than maximum-density routing provides:
• Clock Networks: Must have low skew, low jitter, low coupling.
• High-Speed I/O: Need controlled impedance and minimal crosstalk.
• Reset/Enable Signals: Must be immune to noise-induced glitches.
• Analog References: Voltage references need shielding from digital noise.
• Critical Timing Paths: Worst-case setup paths need reduced capacitance and coupling.

Common NDR Specifications

• Wider Wire Width: Increase wire width by 2× or more — reduces resistance and increases electromigration margin. Example: default 40 nm → NDR 80 nm.
• Wider Spacing: Increase spacing to adjacent wires by 2× or more — reduces capacitive coupling and crosstalk. Example: default 40 nm → NDR 80 nm or 120 nm.
• Double Via: Require via redundancy on all connections for the NDR net.
• Shielding: Route the net with grounded shield wires on both sides — maximum crosstalk protection.
• Layer Restriction: Restrict the net to specific metal layers (e.g., thick upper metals for lower resistance).
• No Jogs: Require straight-line routing without direction changes.

NDR Application in Practice

• Clock Trees: The most common NDR application. Clock wires are routed with wider width and spacing (often called "clock NDR" or "CTS NDR").
• Wider spacing reduces clock-to-signal crosstalk → less jitter.
• Wider width reduces clock wire resistance → less voltage drop, faster edge rates.
• Power/Ground: Critical power connections use NDR for wider width and via redundancy.
• High-Speed Differential Pairs: Use NDR for controlled impedance, matched spacing, and matched length.

NDR in the Design Flow

• NDR rules are defined in the constraint file (SDC, physical constraints).
• The router reads NDR definitions and applies them to specified nets.
• NDR nets consume more routing resources — they may increase routing congestion and require additional metal layers.
• Trade-off: Better signal quality for NDR nets vs. increased area and congestion for the overall design.

Non-default rules are the key mechanism for differentiating routing quality between critical and non-critical nets — they ensure that the most important signals on the chip receive the best possible interconnect quality.