Plasma Ashing Resist Strip
Plasma Ashing and Resist Stripping is the dry process that removes photoresist and etch byproducts using reactive plasma (typically oxygen-based) after lithographic patterning and etch steps, essential for clearing organic residue without damaging the underlying device structures — with increasing complexity at advanced nodes due to sensitive materials (low-k dielectrics, high-k gate oxides, metallic gate electrodes) that can be degraded by aggressive strip chemistries.
Ashing Chemistry:
| Gas System | Temperature | Application | Mechanism |
|---|---|---|---|
| O₂ plasma | 200-300°C | Standard resist strip | Oxidative decomposition of organics |
| O₂/N₂ (forming gas) | 200-250°C | Low-damage strip | Reduced oxidation for sensitive layers |
| CO₂/N₂ | 200-250°C | Ultra-low-damage | Minimal oxidation of metals |
| H₂/N₂ plasma | 250-350°C | Metal gate compatible | Reducing chemistry, no oxidation |
| O₂ + CF₄ | 200-300°C | Ion-implanted resist | Fluorine helps break crust |
Standard O₂ Ashing: Oxygen plasma generates atomic O radicals and O₂⁺ ions that react with the organic photoresist: C_xH_yO_z + O* → CO₂↑ + H₂O↑. The resist converts to volatile gaseous products at rates of 1-10 μm/min depending on temperature and RF power. Downstream or remote plasma minimizes ion bombardment damage by generating radicals in a separate chamber and flowing them to the wafer.
Ion-Implanted Resist (Crust Problem): During high-dose ion implantation, the resist surface is bombarded by the implant species, creating a carbonized "crust" layer (~100-500nm thick) that is extremely resistant to O₂ ashing. If the underlying unimplanted resist is stripped first, pressure from outgassing can cause the crust to pop, creating particle contamination. Solution: multi-step ashing — first break the crust with higher-energy plasma (higher bias, with fluorine addition), then strip the bulk resist with standard O₂ chemistry.
Low-k Dielectric Damage: Oxygen plasma aggressively attacks SiOCH low-k dielectrics by stripping the methyl (Si-CH₃) groups, converting the surface to a SiO₂-like layer with k > 3.9 instead of 2.5-3.0. This increases line-to-line capacitance and degrades RC delay. Mitigation: use CO₂-based or NH₃-based plasma (less oxidizing), minimize exposure time, apply post-ash repair treatments (silylation to restore Si-CH₃), or use H₂/N₂ plasma that strips resist without oxidizing the dielectric.
Metal Gate Compatibility: In HKMG processes, the gate metals (TiN, TaN, TiAl) can be oxidized by O₂ plasma, increasing gate resistance. The replacement metal gate (RMG) process requires strip chemistry that removes resist from the gate trench without oxidizing the metal surfaces. H₂/N₂-based plasma provides reducing conditions that strip organics without metal oxidation.
Residue Removal: After etch + ash, residues often remain: fluorocarbon polymers from fluorine-based etch, metallic residues sputtered from the etch target, and modified resist fragments. These require additional wet cleaning (solvent-based strippers like EKC265 or NMP) or extended plasma treatment. No single strip process removes all residue types.
Plasma ashing epitomizes the complexity of advanced CMOS process integration — a seemingly simple resist removal step that must navigate the conflicting requirements of complete organic removal, material preservation, and residue elimination across an ever-expanding array of sensitive materials in the transistor and interconnect stack.