Redundant via

A redundant via is a deliberate design-for-manufacturing technique that places two or more vias in parallel at the same electrical connection point, specifically so a single defective via can't break the connection entirely. A single via is, statistically, one of the most fragile points in an entire interconnect stack — small enough that a single incomplete fill, a single misalignment, or a single process defect can open the connection outright — and redundant vias exist purely to make that single point of failure survivable.

A via's small size, which makes it space-efficient, is exactly what makes it structurally fragile compared to the metal lines it connects. A metal trace carries current across a relatively wide, continuous path, so a single localized defect rarely interrupts it entirely. A via is a tiny, isolated vertical connection squeezed into the smallest footprint the process allows — meaning a single incomplete copper fill, a single voiding defect, or a single lithographic misalignment at that one specific point can open the connection completely, with no alternate path for current to take. This structural vulnerability is a direct, unavoidable consequence of how small and isolated a via has to be to fit the routing density modern chips need.

Redundant vias directly fix this by giving current an alternate path the moment any single via fails, rather than preventing via defects from happening in the first place. Placing two or more vias in parallel at the same logical connection point means that if one via opens due to a defect, the remaining via (or vias) still carries current across that connection, and the circuit keeps functioning exactly as designed. This is fundamentally a defect-tolerance strategy rather than a defect-prevention one — it doesn't make any individual via more reliable, it just makes the overall connection far less likely to fail by giving it more than one way to succeed.

The reliability improvement from via redundancy is dramatic precisely because via failures are largely statistically independent events. If a single via has some small probability of failing due to a process defect, and that failure probability is roughly independent from via to via, then the probability that BOTH vias in a redundant pair fail simultaneously is roughly the square of a single via's failure probability — a tiny number squared becomes an even tinier number. This statistical relationship is why redundant vias can deliver something like a 10 to 100-fold improvement in connection reliability for the cost of just one extra via, rather than a merely incremental improvement.

That reliability gain comes at a real area cost, which is exactly why redundant via placement is a deliberate, tool-assisted design decision rather than something applied blindly everywhere. Every redundant via needs its own routing space on both metal layers it connects, and in a design already struggling to fit all its required routing into available area, adding a second via at every single connection point isn't always practical. Automated place-and-route and design-for-manufacturing tools typically prioritize redundant vias on the connections where failure would matter most — critical timing paths, high-current paths, or connections identified as particularly vulnerable to a specific process's known defect modes — rather than applying the technique uniformly across an entire design.

Many foundries treat redundant vias as close to mandatory rather than purely optional, because the yield impact of skipping them shows up at the statistical scale a whole chip represents. A single via's failure probability might be vanishingly small in isolation, but a modern chip can contain many millions of vias, and even a tiny per-via failure rate compounds into a meaningful yield loss once multiplied across that many instances. Foundry design rules frequently recommend, and in some process generations effectively require, redundant vias wherever layout density allows it — treating via redundancy as standard manufacturing-aware design practice rather than an optional reliability enhancement reserved for only the most critical connections.