Via First via Last

Via-first versus via-last is a genuinely consequential sequencing decision inside dual-damascene back-end-of-line integration, specifically about whether the via hole or the metal trench gets patterned first — and the choice ripples into which alignment tolerance actually matters most, how the etch has to be controlled, and ultimately how reliable the finished interconnect stack turns out to be at advanced dimensions. Neither sequence is universally superior; the right choice can shift from node to node as via and trench dimensions, aspect ratios, and dielectric stacks evolve.

Via-first integration patterns and etches the via hole before anything else, which means the via's final position is set against the metal layer beneath it directly — producing genuinely good via-to-metal-below alignment, since that alignment happens first, against a reference layer that hasn't yet been complicated by any subsequent trench topography. This clean early alignment is via-first's defining advantage, but it comes with a real cost on the next step: the trench lithography that follows has to pattern and expose resist directly over a wafer surface that already has via holes etched into it, and getting resist to fill and expose evenly over that pre-existing topography is a genuinely harder lithographic problem than patterning the same trench on a flat surface would be.

Via-last, also called trench-first, reverses the sequence — the trench gets patterned and partially etched first, on a completely flat, unpatterned dielectric surface, which gives the trench lithography step noticeably better process control than it would have over via-first's pre-etched topography. This flat-surface advantage for trench litho is exactly what via-last trades for a harder problem downstream: the via now has to be etched through whatever dielectric remains below the already-patterned trench, and because that via etch happens after the trench, the via's final alignment target becomes the trench itself rather than the metal layer below — shifting the tightest alignment requirement from via-to-metal (via-first's concern) to via-to-trench (via-last's concern).

The choice between these two sequences is fundamentally a decision about which of two specific alignment and etch challenges a given technology node can tolerate more easily, and that answer genuinely shifts as via diameter, aspect ratio, and the surrounding dielectric stack evolve from node to node — there's no single universally correct answer that holds across every generation. A node with a particularly aggressive via aspect ratio might favor via-first specifically because protecting the via during trench lithography (via-first's hard problem) is more tractable than achieving sufficiently tight via-to-trench overlay (via-last's hard problem) at that node's dimensions, while a different node's dominant constraint could easily favor the opposite conclusion.

Etch control differs meaningfully between the two approaches as well: via-first requires the via to survive the subsequent trench etch without excessive erosion or distortion, while via-last requires etching a deep, narrow via hole through dielectric that the trench etch has already partially removed from above, changing the effective aspect ratio and etch chemistry behavior the via etch actually experiences. This etch-behavior difference is exactly why a sequencing choice that works well at one node's dielectric stack and via dimensions can become genuinely problematic at a later node with a different stack or tighter dimensions, independent of whatever alignment considerations might otherwise favor that same sequence.

Because the optimal via-first-versus-via-last choice is node-specific rather than fixed, foundries routinely revisit this decision at every new technology node, weighing that generation's specific via aspect ratio, trench dimensions, and dielectric stack against both approaches' known failure modes before committing to one sequence for that node's back-end-of-line integration scheme. This node-by-node reevaluation is exactly why via-first-versus-via-last appears as a recurring integration decision throughout BEOL process development history rather than as a question that got permanently settled once and never revisited — the two approaches' relative advantages trade places as the underlying geometry keeps shrinking.