Voiding in Copper
Voiding in copper is a reliability failure mechanism where empty cavities form within copper interconnect lines or vias — driven by stress migration, electromigration, or simple incomplete fill during electroplating — degrading the connection's conductivity or, if the void grows large enough, severing it into a complete open circuit. It's widely considered the single biggest copper interconnect reliability concern at advanced nodes, precisely because voids form invisibly, underneath an otherwise perfectly normal-looking metal surface, until the damage finally shows up as a measurable electrical problem.
Plating voids originate during the electroplating process itself, before the copper has even finished solidifying into its final shape, which makes them fundamentally a manufacturing-process problem rather than a field-use degradation mechanism. Poor superfill chemistry — the specialized electroplating formulation designed to fill narrow trenches from the bottom up rather than from the sides inward — can fail to complete that fill properly, leaving a gap behind. Seed-layer discontinuity (a break in the thin conductive layer plating current needs to flow through) or simple pinch-off, where a narrow trench opening closes at the top before the deposit beneath has fully filled, are both specific, identifiable manufacturing-process failure modes that produce this same end result: a void trapped inside the copper before the structure was ever complete.
Stress-induced voiding (SIV) forms afterward, during a device's normal operating life, driven by the same copper-versus-dielectric thermal expansion mismatch that causes stress migration generally — but specifically producing voids rather than the more general migration pattern. As a chip cycles through normal operating temperature swings, copper's tendency to contract more than the surrounding dielectric creates sustained tensile stress in the copper, and that stress drives copper atoms to migrate toward free surfaces or interfaces to relieve it — leaving a void behind at wherever that migration originated from. This is a slow, cumulative mechanism that builds over a device's operating life, distinct from plating voids' manufacturing-time origin.
Electromigration voids form specifically at the cathode end of a current-carrying line, driven by the sustained momentum transfer between flowing electrons and the metal atoms they collide with as current flows continuously in one direction. Electron flow through a conductor isn't perfectly non-interacting — electrons occasionally transfer enough momentum to actual metal atoms to physically displace them, and under sustained current flow in a consistent direction, this displacement accumulates net atomic transport away from the cathode end specifically, eventually opening a void right where that mass transport originated. This mechanism specifically requires sustained, directional current flow — unlike stress-induced voiding, which can occur even in lines that never carry significant current at all.
Via bottoms are the single most critical location for all three voiding mechanisms, because that's precisely where current density, and therefore both electromigration risk and the electrical consequence of any void, both peak simultaneously. A via's smaller cross-sectional area compared to the metal lines it connects concentrates current density right at that transition point, making it the most electromigration-vulnerable location in the entire interconnect structure. It's also geometrically the most structurally vulnerable point for stress and plating-related voiding, since the via's narrow geometry is exactly the kind of feature that superfill plating struggles with most and that stress concentrates around most severely.
The electrical consequence of a copper void scales directly and dramatically with how much of the current-carrying cross-section it actually blocks, which is exactly why even a partial void matters long before it becomes a complete open. A void that only partially blocks a via's cross-section still forces the same total current through a smaller remaining conductive area, producing a measurable, and sometimes substantial, resistance increase at that specific point — degrading circuit performance well before the connection fails outright. A void that eventually spans the via's entire cross-section produces a complete open circuit, total connection failure. This progressive worsening — from measurable resistance increase to eventual complete open — is exactly why voiding detection and prevention receive such dedicated attention in advanced-node reliability engineering, rather than being treated as a binary pass/fail concern only at the point of complete failure.