What Is CVD
Chemical Vapor Deposition (CVD) is how a fab builds material up on the wafer instead of carving it away. Where plasma etch removes everything outside the mask, CVD does the opposite: precursor gases flow over the wafer, react or decompose right at the surface, and leave behind a solid thin film — silicon dioxide, silicon nitride, polysilicon, tungsten, and dozens of other materials — one atomic or molecular layer at a time. Deposition and etch are the two halves of the loop that builds a chip's 60–100+ patterned layers: CVD lays material down, lithography patterns it, etch cuts the pattern in, and the cycle repeats.
The reason CVD matters so much is a single word: conformality. A flat spin-coated or sputtered film struggles to coat the inside of a deep, narrow trench evenly — it piles up at the top and starves at the bottom. CVD's gas-phase surface reaction can wrap around corners and coat sidewalls and trench bottoms almost as well as flat surfaces, because the reactive species arrive from every direction inside the chamber rather than travelling in a straight line from one source. That property is exactly what modern 3D transistor structures and high-aspect-ratio vias require — a film that is too thin at the bottom of a trench leaves a device with no working gate dielectric or a via with no real electrical contact.
Not every CVD process runs the same way, and the choice of variant trades off speed, temperature, and film quality. Thermal CVD relies purely on heat to drive the surface reaction and produces dense, high-quality films but often needs high temperatures that can damage temperature-sensitive layers already on the wafer. Plasma-Enhanced CVD (PECVD) uses a plasma to help break apart precursor gases, so it can deposit good films at much lower temperatures — useful later in the process flow when the wafer already has delicate structures on it. Low-Pressure CVD (LPCVD) trades speed for excellent uniformity across a whole batch of wafers. Atomic Layer Deposition (ALD) takes conformality to its logical extreme, alternating self-limiting precursor pulses one atomic layer at a time.
| CVD Variant | Typical Temperature | Conformality | Deposition Rate | Common Use |
|---|---|---|---|---|
| Thermal CVD | High (600–1000°C) | Good | Fast | Polysilicon, thick oxides |
| PECVD | Low–moderate (200–400°C) | Moderate | Fast | Passivation layers, low-temp dielectrics |
| LPCVD | Moderate–high | Very good | Slow (batch) | Nitride films, uniform batch coatings |
| ALD | Low–moderate | Excellent (near-100%) | Very slow (per cycle) | High-k gate dielectrics, thin conformal barriers |
Getting film thickness and uniformity wrong doesn't just hurt one chip — it can quietly hurt the whole wafer. Because CVD reactions are sensitive to temperature and gas flow uniformity across a 300 mm wafer, engineers constantly monitor deposition rate and thickness at multiple points to catch drift before it turns into a yield problem. A film a few angstroms too thin at the wafer edge, repeated across dozens of layers, compounds into devices that behave differently at the edge than at the center.
CVD and ALD are what make today's most advanced AI chip structures physically possible. The thin, ultra-conformal high-k dielectric wrapped around a GAA nanosheet gate, the barrier and liner films lining a copper interconnect via, and the dielectric layers stacked inside HBM memory — all of them depend on deposition processes that can coat impossibly small, high-aspect-ratio features evenly. As transistors and vias keep shrinking, the margin for a "close enough" film gets thinner every generation, which is exactly why deposition tool makers keep pushing ALD further: it is, in effect, the only way left to guarantee a uniform film inside a structure only a few atoms wide.