← Back to Chip Foundry Services

Glossary

27,049 technical terms and definitions

A B C D E F G H I J K L M N O P Q R S T U V W X Y Z All
Showing page 136 of 541 (27,049 entries)

DRAM 64k 1979 Full Row Activation Refresh Coupling

ras activates entire row simultaneously access transistors, row wide refresh side effect single cell access, ras only cycle deliberate row refresh tool mechanism

One Strobe Touches Every Cell in a Row, Whether You Asked It To or Not 1. Follow RAS Past Addressing Into What It Actually Does to the Array Step 2 treated as an addressing…

DRAM 64k 1979 Count Refresh Cycles Array Geometry

row column split r times c determines refresh count, wide rows fewer refresh cycles more sense amp load, refresh overhead t_rc tradeoff row count sense amplifier power

Choose the Array's Shape, and the Refresh Count Falls Out of That Choice 1. Turn Step 3's Row-Wide Refresh Into a Concrete Cycle Count Step 3 established that one -only cycle…

DRAM 64k 1979 on Chip Refresh Counter Automation

automated row stepping host triggers refresh generically, refresh overhead fraction r times t_rc over t_ret, responsibility moves to chip where retention physics lives

Let the Chip Remember Which Row Comes Next, So the System Does Not Have To 1. State What Manual Row-Stepping Would Demand of the Host System Step 4 established that a complete…

DRAM 64k 1979 Classify What Later DRAM Inherits

multiplexed addressing architecture outlives specific numbers, pin count constraint propagated never resolved away, first dram series about periphery not cell interior

Classify and Close: What Every Later DRAM Keeps, and What Was Only 64K's Own Arithmetic 1. Separate the Enduring Mechanism From This Generation's Particular Numbers Every step…

DRAM Scaling 1974 Planar Capacitor Area Collapses Under Scaling

1t1c dram cell trench stacked capacitor transition, dram capacitor area shrinks faster than signal charge requirement, dram scaling 1974 geometry limit leaves the plane for the third dimension

Why a Shrinking Cell Forces the Capacitor Off the Plane: Planar Charge Storage Collapses Under Scaling 1. State the Constraint the 1968 Cell Never Had to Face The 1T1C cell fixes…

DRAM Scaling 1974 Choose Between Etching Down Trench Building Up Stacked

trench versus stacked capacitor dram 3d cell geometry, dram scaling substrate trench punchthrough vs stacked topography, 1t1c capacitor area perimeter height product third dimension

Step 2 — Choose Between Etching Down (Trench) and Building Up (Stacked): Two Geometries for the Third Dimension 1. The Fundamental Fork: Substrate Etching vs. Over-Gate…

DRAM Scaling 1974 Build the Trench Etch Depth Area Budget

deep reactive ion etch trench capacitor aspect ratio limits, dram trench sidewall capacitance scales with etch depth, aspect ratio dependent etching arde and void free fill dram

Step 3 — Build the Trench: Etch Depth as the New Area Budget 1. Sidewall Area Replaces Planar Pitch By cutting a high-aspect-ratio vertical cavity into the silicon substrate…

DRAM Scaling 1974 Build Stacked Capacitor Above Transistor

stacked capacitor crown cylinder hsg poly storage node dram, stacked dram alpha soft error immunity dielectric isolated, stacked capacitor topography step height depth of focus

Step 4 — Build the Stacked Capacitor: Rising Above the Transistor 1. Climbing Vertically into the Free Space Above the Gate Rather than excavating deep into the fragile silicon…

DRAM Scaling 1974 Compare Two Geometries Same Electrical Terms

trench versus stacked quantitative aspect ratio comparison dram, why dram industry forked trench versus stacked capacitor camps, dram storage capacitance 35 femtofarad area budget comparison

Step 5 — Compare the Two Geometries on the Same Electrical Terms: Why the Industry Forked 1. Equalizing the Electrical Baseline: The 35 fF Target When trench and stacked…

DRAM Scaling 1974 Isolate Trench Capacitor from Substrate

trench dram buried plate oxide collar parasitic punchthrough, vertical parasitic mosfet suppression buried strap dram, trench to trench bulk punchthrough depletion merge isolation

Step 6 — Isolate the Trench Capacitor From the Substrate: Buried Plates and Oxide Collars 1. The Parasitic Perils of a Shared Silicon Bulk Because the trench capacitor is carved…

DRAM Scaling 1974 Fill Trench Without Leaving a Void

trench dram keyhole void pinch off knudsen diffusion limit, conformal lpcvd dielectric and polysilicon trench fill dram, step coverage aspect ratio dependent deposition dram yield

Step 7 — Fill the Trench Without Leaving a Void: Conformal Deposition and the Pinch-Off Limit 1. Knudsen Diffusion and the Threat of Premature Pinch-Off Once a high-aspect-ratio…

DRAM Scaling 1974 Planarize Stacked Capacitor CMP

chemical mechanical polishing preston equation dram global planarity, stacked dram array periphery step height depth of focus loss, bpsg reflow vs oxide cmp planarization stacked capacitor dram

Step 8 — Planarize the Stacked Capacitor for the Layers Above It: Chemical Mechanical Polishing and Global Planarity 1. The Topographic Cliff Between Memory Array and Peripheral…

DRAM Scaling 1974 Measure Payoff Capacitance Process Complexity

trench vs stacked cost accounting femtofarad per mask dram, dram process steps mask count cmp vs deep rie capital cost, storage capacitance yield figure of merit fab economics dram

Step 9 — Measure the Payoff: Capacitance Recovered Per Unit of Process Complexity 1. The Cost-Accounting of 3D Charge Storage Escaping the planar scaling crisis required adding…

DRAM Scaling 1974 Retrospective Leaving Plane Only Way Forward

dennard scaling breakdown 3d capacitor evolution dram, trench vs stacked legacy 3d semiconductor architecture dram, when planar physics failed 3d dimension solved moore law

Step 10 — The 1974 Retrospective: When Leaving the Plane Became the Only Way Forward 1. The Immutable Circuit Law and the Collapse of Two Dimensions Robert Dennard’s 1968 1T1C…

DRC

lvs, verification, design rule check, physical verification

Physical verification constitutes the essential electronic design automation signoff methodology that rigorously validates whether an integrated circuit layout satisfies foundry…

DRC Basics

design rule check, design rules, physical verification drc

Physical verification constitutes the essential electronic design automation signoff methodology that rigorously validates whether an integrated circuit layout satisfies foundry…

DRC (design Rule Check)

drc, design rule check, design

Physical verification constitutes the essential electronic design automation signoff methodology that rigorously validates whether an integrated circuit layout satisfies foundry…

DRC LVS Physical Verification

calibre physical verification, design rule violation, layout vs schematic check, parasitic extraction pex

Physical verification constitutes the essential electronic design automation signoff methodology that rigorously validates whether an integrated circuit layout satisfies foundry…

Dreambooth

generative models

DreamBooth fine-tunes diffusion models to generate specific subjects or styles from few example images. Approach: Fine-tune entire model (or LoRA) on images of subject with unique…

Dreambooth

generative models

DreamBooth is the fine-tuning approach that personalizes a diffusion model to a subject concept using instance images and class-preservation regularization - it can produce strong…

Dreambooth

multimodal ai

DreamBooth is a personalization method that fine-tunes diffusion models to generate a specific subject from text prompts - It enables subject-consistent generation from a small…

Dreamer

reinforcement learning

Dreamer is a model-based reinforcement learning agent that achieves state-of-the-art sample efficiency by learning a world model from sensory inputs and training a policy entirely…

Dreamer

reinforcement learning advanced

Dreamer is a model-based reinforcement-learning family that trains policies from imagined latent trajectories - Dreamer learns latent dynamics and optimizes actor-critic…

Dreamfusion

3d vision

DreamFusion is the text-to-3D optimization framework that distills 2D diffusion priors into a 3D representation through rendered views - it introduced score-distillation guidance…

Dreamfusion

multimodal ai

DreamFusion is a text-to-3D optimization method using 2D diffusion priors to supervise 3D scene generation - It creates 3D content without paired text-3D training data. What Is…

Drift

monitoring, shift

Drift Monitoring for data drift and model drift detects when input distributions or model performance change over time, triggering alerts for investigation and potential…

Drift-Aware-Feature-Store Machine Learning

Feature Store Online Drift Monitoring and Versioning Introduction & Motivation Feature Store Online Drift Monitoring and Versioning addresses a central problem in {subject}…

Drift Detection

data drift, concept drift, feature drift, model drift, distribution shift detection

Drift detection definition and system boundary. Drift detection identifies statistically and operationally meaningful change between a reference distribution or relationship…

Drift Diffusion

drift-diffusion transport, drift-diffusion model, semiconductor carrier transport, drift diffusion equations, semiconductor continuity equations, quasi-fermi transport, TCAD drift diffusion

Drift–diffusion transport is the continuum model that converts electric fields, carrier-density gradients, generation, recombination, and contact injection into semiconductor…

Drift Monitoring

production

Drift monitoring tracks slow, gradual changes in equipment performance, process parameters, or output characteristics over time, enabling predictive maintenance and proactive…

Drift-vs-Anomaly Machine Learning

Drift Detection vs Anomaly Detection Introduction & Motivation Drift Detection vs Anomaly Detection addresses a central problem in anomaly detection and {target} scoring: how…

Drive-in

diffusion

Drive-in is a high-temperature anneal that diffuses implanted or deposited dopants deeper into the silicon wafer to achieve the desired junction depth and profile. Process: Wafer…

Drive in Diffusion Dopant Profile Tail Prediction Machine Learning

drive-in diffusion dopant profile tail prediction, drive-in diffusion dopant, diffusion dopant profile, dopant profile tail, profile tail prediction, dopant profile

Drive-In Diffusion Dopant Profile Tail Prediction with Machine Learning Introduction & Motivation Drive-In Diffusion Dopant Profile Tail Prediction with Machine Learning addresses…

Drone-Flight-Control-Stability Machine Learning

drone flight control stability, drone flight control, flight control stability, drone flight, flight control, control stability

Drone Flight Control Stability Introduction & Motivation Drone Flight Control Stability addresses a central problem in drones process control and control-loop-frequency-hz…

Drop

drop, evaluation

DROP is a reading comprehension benchmark requiring discrete reasoning such as counting, comparison, and arithmetic over text - It is a core method in modern AI evaluation…

Drop Benchmark

numerical reasoning, reading comprehension

DROP (Discrete Reasoning Over Paragraphs) is a reading comprehension benchmark requiring numerical reasoning operations like addition, counting, and sorting over text passages.…

Drop Height Survivability Prediction Machine Learning

drop height survivability prediction, drop height survivability, height survivability prediction, drop height, height survivability, survivability prediction

Drop Height Survivability Prediction with Machine Learning Introduction & Motivation Drop Height Survivability Prediction with Machine Learning addresses a central problem…

Drop-in

yield enhancement

Drop-In is a temporary replacement of product patterns with dedicated monitor structures at selected wafer sites - It provides focused process diagnostics at strategic locations.…

Drop-in Test Structures

metrology

Spectroscopic ellipsometry and inline optical wafer metrology constitute the non-destructive physical measurement and defect detection disciplines that govern yield control across…

Drop Test

failure analysis advanced

Semiconductor failure analysis (FA), non-destructive inspection, and advanced electrical fault isolation (EFI) constitute the essential metrological and diagnostic disciplines…

Dropout

inference, approximate

Regularization is the family of techniques that fight *overfitting* — the tendency of a model with enough capacity to memorize its training data, including the noise, instead…

Dropout Random Neuron Deactivation Prediction Machine Learning

dropout random neuron deactivation and regularization, dropout random neuron, random neuron deactivation, neuron deactivation regularization, dropout random, random neuron

Dropout Random Neuron Deactivation and Regularization Introduction & Motivation Dropout Random Neuron Deactivation and Regularization addresses a central problem in dropout…

Dropout-Rate-Tuning Machine Learning

Dropout Rate Optimization Introduction & Motivation Dropout Rate Optimization addresses a central problem in optimization algorithm tuning and improvement: how to Optimize…

Dropout Regularization

dropout layer, dropout rate

Dropout — a regularization technique that randomly deactivates neurons during training, forcing the network to learn redundant representations and reducing overfitting. How It…

Dropout Regularization

dropout layer, dropout rate, spatial dropout, droppath, stochastic depth

Dropout regularization randomly masks a fraction of activations during training to discourage brittle co-adaptation. It improves generalization in many models by exposing each…

Dropout Regularization

weight decay, overfitting prevention, stochastic regularization, deep network generalization

Dropout and Regularization Techniques — Regularization methods prevent deep networks from memorizing training data, ensuring learned representations generalize to unseen examples…

Dropout-Regularization-Analysis Machine Learning

dropout and regularization techniques, dropout regularization techniques, dropout regularization, regularization techniques

Dropout and Regularization Techniques Introduction & Motivation Dropout and Regularization Techniques addresses a central problem in ml-training process control…