Bipolar
BiCMOS integrates bipolar junction transistors (BJTs) and CMOS transistors on the same substrate, letting one chip combine CMOS's low-power logic with bipolar's high current and voltage gain — valuable wherever a design genuinely needs both, like mixed-signal chips, RF front-ends, and high-current output drivers.
The two transistor types aren't just electrically different — they're built in fundamentally different shapes. A CMOS transistor is shallow and planar: current flows sideways near the surface, gated by a thin control electrode sitting right above the channel. A BJT is deep and vertical: current flows straight down from emitter through base to collector, with device performance depending on carefully controlled junction depths rather than a surface gate at all. BiCMOS process integration means running both geometries through the same wafer, which is exactly why it adds so much process complexity rather than simply being "CMOS plus an extra mask."
The bipolar side needs its own dedicated structural support. A BJT's collector typically sits in a selectively grown epitaxial silicon layer — a thin, lower-defect-density region grown specifically to control collector resistance and punch-through voltage, parameters a standard CMOS process has no equivalent need for. Getting both the base-emitter junction (shallow) and collector-base junction (deeper) to the right depths, with the right doping profiles, directly sets the transistor's current gain (β) — this is precision the CMOS portion of the same wafer never has to deliver.
Heterojunction bipolar transistors (HBTs) push bipolar performance further by changing the base material itself. A SiGe HBT uses silicon-germanium instead of plain silicon for the base region, which raises current gain and lowers base resistance simultaneously — exactly the combination that pushes operating frequency higher, which is why SiGe HBTs (and GaAs HBTs in III-V processes) dominate the highest-frequency RF and mixed-signal applications rather than conventional silicon BJTs.
Keeping the two transistor families from interfering with each other is its own isolation problem. Separate wells, guard rings, and deliberate substrate biasing prevent the bipolar devices — which dissipate noticeably more power than their CMOS neighbors — from triggering latch-up or coupling noise into sensitive analog circuits nearby. Where BiCMOS circuits do analog work, matched pairs of transistors, resistors, and capacitors need layout techniques like interdigitation and common-centroid placement just to track each other reliably across the die.
BiCMOS has a real scaling ceiling, which is why it's less common below 90nm. Shrinking bipolar devices hurts rather than helps: reducing base width to chase higher transit frequency also reduces emitter area and current capability, working against the very speed gains the shrink was meant to deliver. As CMOS performance closed the gap with bipolar for most applications, BiCMOS's niche narrowed to the specific high-current, high-frequency analog and RF circuits where bipolar's advantages genuinely still outweigh its integration cost.