Detectron2
facebook, detection
Detectron2 is Meta AI Research's open-source library for state-of-the-art object detection, instance segmentation, and panoptic segmentation — built on PyTorch with a modular…
27,049 technical terms and definitions
facebook, detection
Detectron2 is Meta AI Research's open-source library for state-of-the-art object detection, instance segmentation, and panoptic segmentation — built on PyTorch with a modular…
signal & power integrity
Deterministic Jitter is bounded jitter components linked to specific repeatable causes - It includes data-dependent and periodic timing shifts that can be isolated and mitigated.…
reproducible parallel, parallel reproducibility, floating point nondeterminism, cuda deterministic
Deterministic Parallel Execution is the guarantee that a parallel program produces bit-identical results across multiple runs, despite non-deterministic thread scheduling…
Deterministic Policy Gradient Introduction & Motivation Deterministic Policy Gradient addresses a central problem in reinforcement policy learning and gradient-variance-reduction…
parallel execution replay, record and replay concurrency, heisenbug debugging parallel, deterministic schedule capture
Deterministic Replay for Parallel Programs is the debugging methodology that records enough nondeterministic events to reproduce concurrent failures exactly. What It Covers Core…
best practices
Deterministic training is the training mode that enforces repeatable execution paths to minimize run-to-run numerical variation - it often trades raw speed for consistency and is…
ai safety
Detoxification is the set of techniques for reducing or eliminating toxic, harmful, offensive, or inappropriate content from language model outputs — addressing one of the most…
Detrended Fluctuation Analysis DFA for Long Memory Introduction & Motivation Detrended Fluctuation Analysis DFA for Long Memory addresses a central problem in timeseries…
photoresist develop, photoresist development, tmah development, resist dissolution kinetics, alkaline developer, pattern development, dissolution rate, lithography
Photoresist development is the chemical process that selectively dissolves and removes either exposed or unexposed polymer regions from a photoresist film in an aqueous alkaline…
develop process residue prediction, develop process residue, process residue prediction, develop process, process residue, residue prediction
Develop Process Residue Prediction with Machine Learning Introduction & Motivation Develop Process Residue Prediction with Machine Learning addresses a central problem…
develop puddle time optimization prediction machine learning, develop puddle, time optimization prediction, develop puddle time optimization prediction, develop puddle time
Develop Puddle Time Optimization Prediction with Machine Learning Introduction & Motivation Develop Puddle Time Optimization Prediction with Machine Learning addresses a central…
develop time and resist profile uniformity prediction, develop time resist, time resist profile, resist profile uniformity, profile uniformity prediction, develop time
Develop Time and Resist Profile Uniformity Prediction with Machine Learning Introduction & Motivation Develop Time and Resist Profile Uniformity Prediction with Machine Learning…
developer chemical shelf life prediction, developer chemical shelf, chemical shelf life, shelf life prediction, developer chemical, chemical shelf, shelf life, life prediction
Developer Chemical Shelf Life Prediction with Machine Learning Introduction & Motivation Developer Chemical Shelf Life Prediction with Machine Learning addresses a central problem…
developer concentration drift prediction machine learning, developer concentration, drift prediction machine, cd, developer concentration drift prediction, concentration drift
Developer Concentration Drift Prediction with Machine Learning Introduction & Motivation Developer Concentration Drift Prediction with Machine Learning addresses a central problem…
Developmental Biology and Embryogenesis: Pattern Formation, Morphogenesis, and Organogenesis Executive Overview Developmental biology investigates how a single cell (fertilized…
Developmental Biology: Morphogens, Gene Networks, and Pattern Formation Developmental biology explains how one fertilized cell produces an organized organism containing many cell…
Deviance Networks for End-to-End Anomaly Scoring Introduction & Motivation Deviance Networks for End-to-End Anomaly Scoring addresses a central problem in anomaly detection…
quality
Deviation Permit is a pre-approved authorization to intentionally depart from a specified process requirement for a defined time period, quantity of product, or set of conditions…
device aging induced performance drift prediction, device aging induced, aging induced performance, induced performance drift, performance drift prediction
Device Aging Induced Performance Drift Prediction with Machine Learning Introduction & Motivation Device Aging Induced Performance Drift Prediction with Machine Learning addresses…
device binning effectiveness prediction, device binning effectiveness, binning effectiveness prediction, device binning, binning effectiveness, effectiveness prediction
Device Binning Effectiveness Prediction with Machine Learning Introduction & Motivation Device Binning Effectiveness Prediction with Machine Learning addresses a central problem…
device characterization coverage prediction, device characterization coverage, characterization coverage prediction, device characterization, characterization coverage
Device Characterization Coverage Prediction with Machine Learning Introduction & Motivation Device Characterization Coverage Prediction with Machine Learning addresses a central…
device driver architecture, device driver, driver architecture
Device Driver Architecture Introduction & Motivation Device Driver Architecture addresses a central problem in systems process control and driver-latency-context-switch…
device interface board contact prediction, device interface board, interface board contact, board contact prediction, device interface, interface board, board contact
Device Interface Board Contact Prediction with Machine Learning Introduction & Motivation Device Interface Board Contact Prediction with Machine Learning addresses a central…
SOI device layer, fully depleted SOI, FD-SOI thickness uniformity, threshold voltage thickness dependence, electrostatic channel control, thick SOI MEMS photonics, single crystal silicon film, SOI cost driver, short channel effects
The device layer is the thin, top single-crystal silicon film in an SOI wafer stack — the exact layer where every active transistor actually gets fabricated, sitting directly on…
device model parameter extraction accuracy prediction, device model parameter, model parameter extraction, parameter extraction accuracy, device model
Device Model Parameter Extraction Accuracy Prediction with Machine Learning Introduction & Motivation Device Model Parameter Extraction Accuracy Prediction with Machine Learning…
device parameter mismatch distribution prediction, device parameter mismatch, parameter mismatch distribution, mismatch distribution prediction, device parameter
Device Parameter Mismatch Distribution Prediction with Machine Learning Introduction & Motivation Device Parameter Mismatch Distribution Prediction with Machine Learning addresses…
device physics scaling, device physics & scaling, dennard scaling breakdown, transistor scaling physics, why transistor scaling stopped, power wall scaling, subthreshold slope scaling, scaling and device physics
Device physics and scaling is the story of what a transistor actually is at the physical level, and why making it smaller — the engine of the whole industry — went from nearly…
device physics math, semiconductor device physics, TCAD modeling, drift diffusion, poisson equation, mosfet physics, quantum effects
Device Physics & Mathematical Modeling 1. Fundamental Mathematical Structure Semiconductor modeling is built on coupled nonlinear partial differential equations spanning multiple…
tcad, device physics, semiconductor device physics, band theory, drift diffusion, poisson equation, boltzmann transport, carrier transport, mobility models, recombination models, process tcad
Device Physics, TCAD, and Mathematical Modeling Every transistor is governed by the same physics — the drift and diffusion of charge carriers through a doped crystal under…
design
Device Simulation Overview Device simulation uses numerical methods to solve semiconductor physics equations (Poisson's equation, carrier continuity, drift-diffusion…
device sorting accuracy prediction, device sorting accuracy, sorting accuracy prediction, device sorting, sorting accuracy, accuracy prediction
Device Sorting Accuracy Prediction with Machine Learning Introduction & Motivation Device Sorting Accuracy Prediction with Machine Learning addresses a central problem in device…
device synchronization barrier cost and deadlock prevention, device synchronization barrier, synchronization barrier cost, barrier cost deadlock, cost deadlock prevention
Device Synchronization Barrier Cost and Deadlock Prevention Introduction & Motivation Device Synchronization Barrier Cost and Deadlock Prevention addresses a central problem…
device tree abstraction, device tree, tree abstraction
Device Tree Abstraction Introduction & Motivation Device Tree Abstraction addresses a central problem in systems process control and device-discovery-enumeration prediction: how…
device tree binding configuration accuracy prediction, device tree binding, tree binding configuration, binding configuration accuracy, configuration accuracy prediction
Device Tree Binding Configuration Accuracy Prediction with Machine Learning Introduction & Motivation Device Tree Binding Configuration Accuracy Prediction with Machine Learning…
dts, dtb, device tree source, device tree blob, linux hardware description, device tree overlay
Device tree is a structured hardware description passed to an operating system so drivers can discover devices and their resources without board-specific kernel code. It decouples…
advanced packaging
Device Wafer is the silicon wafer containing the fabricated integrated circuits (transistors, interconnects, memory cells) that will become the final semiconductor product…
semiconductor devices, semiconductor device, mosfet, cmos, transistor types, subthreshold swing, leakage current, gate all around, nanosheet, cfet, hemt, igbt, sic mosfet, gan hemt, power devices, memory cell, steep slope devices
A semiconductor device is a structure that exploits the controllable conductivity of a semiconductor to do one useful job: switch, amplify, rectify, store charge, or convert…
text generation
DExperts is the decoding-time controllable generation method that combines an expert language model (trained on desired text) with an anti-expert model (trained on undesired text)…
dfe, signal & power integrity
DFE is decision feedback equalization that cancels post-cursor ISI using prior symbol decisions - It improves receiver margin by subtracting predicted interference from sampled…
dfm, design for manufacturability, design
Design for Manufacturability (DFM) encompasses all design practices, techniques, and tools that optimize a chip layout to improve manufacturing yield, reduce defect sensitivity…
dfm lithography hotspot prediction, dfm lithography hotspot, lithography hotspot prediction, dfm lithography, lithography hotspot, hotspot prediction
DFM Lithography Hotspot Prediction with Machine Learning Introduction & Motivation DFM Lithography Hotspot Prediction with Machine Learning addresses a central problem…
litho friendly design, critical area analysis, caa, dfm litho, lithography friendly design rules
Design for Manufacturability (DFM) — Lithography Rules is the set of design guidelines that extend beyond minimum DRC (Design Rule Check) rules to ensure that circuit layout…
dual flat no-lead, leadless package
DFN package is the dual flat no-lead package with terminals on two opposing sides and optional exposed thermal pad - it is a compact leadless format commonly used for analog…
dft, design & verification
Design-for-test architectures, automatic test pattern generation, and structural fault modeling constitute the digital verification and manufacturing test disciplines engineered…
dft, design for testability, scan chain, atpg, bist, jtag
Design-for-test architectures, automatic test pattern generation, and structural fault modeling constitute the digital verification and manufacturing test disciplines engineered…
scan chain insertion, scan compression architecture, scan chain balancing, scan test pattern generation
Design-for-test architectures, automatic test pattern generation, and structural fault modeling constitute the digital verification and manufacturing test disciplines engineered…
dgx, infrastructure
DGX systems is the integrated AI compute platforms that combine GPUs, high-speed interconnect, and optimized software in a validated architecture - they reduce infrastructure…
signal & power integrity
The power delivery network (PDN) is the entire electrical path that carries current from the voltage regulator to every transistor on the die — the board planes, the package…
di, environmental & sustainability
Semiconductor cleanroom engineering, ultra-pure water synthesis, and advanced facility distribution networks constitute the critical physical infrastructure required to sustain…
di water, deionized water, facility
Semiconductor cleanroom engineering, ultra-pure water synthesis, and advanced facility distribution networks constitute the critical physical infrastructure required to sustain…