Semiconductor Process Node Naming

A process node name like "7nm," "5nm," or "3nm" hasn't described a physical transistor dimension in any literal sense for well over a decade — it's a marketing label, loosely descended from an older naming convention, that different foundries now assign using different internal rules. Comparing two chips by node number alone tells you almost nothing reliable about which one is actually smaller, faster, or more efficient; the real comparison requires looking at transistor density, performance at a given power, and SRAM scaling directly.

Node names used to track a real physical dimension, and that history is exactly why the labels persist even though they stopped meaning the same thing. In the planar-transistor era — roughly the late 1990s through the early 2010s — a node name like "90nm" or "45nm" corresponded reasonably closely to the actual minimum gate length foundries could manufacture at that generation. Shrinking the gate length was the single clearest way to improve transistor density and speed, so the node name and the real geometry moved together, and comparing two processes by node number was a genuinely useful shorthand.

That correspondence broke down once FinFET transistors arrived around the 22-14 nanometer generation, and it has only diverged further since. A FinFET's performance and density depend on fin height, fin pitch, and gate pitch working together, not on any single linear dimension the way a planar gate length once did — there's no longer one physical number a node name could honestly correspond to even if a foundry wanted it to. Gate-all-around transistors, now entering production, add nanosheet width and stacking count as further independent variables. The industry kept using nanometer-style names anyway, because the branding convention was too entrenched to abandon, even as the physical meaning behind the number quietly disappeared.

Each foundry now defines its own node names using its own internal methodology, which is exactly why cross-foundry comparisons by name alone are unreliable. TSMC's N3, Samsung's 3nm, and Intel's 18A are not standardized against each other in any way — a foundry can name its process however it believes best represents its generational improvement, often guided more by marketing and competitive positioning than by any single measurable dimension. Two processes with similar node names from different foundries can have meaningfully different real transistor density, and two processes with different-looking node names (Intel's "18A" versus a competitor's "2nm," for instance) can turn out to deliver comparable actual performance.

Transistor density — logic gates or standard cells per square millimeter — is the metric that actually substitutes for what node names used to represent. Density depends on the full standard-cell library, design rules, and interconnect pitch used in that process, not just transistor geometry in isolation; two processes with identical transistor dimensions but different design rules can land at meaningfully different real density. SRAM density is often tracked and reported separately from logic density, because memory bitcells scale differently than logic standard cells do, and a process that scales logic well doesn't automatically scale SRAM at the same rate — a distinction that matters enormously for any chip where on-die cache area is a major cost driver.

Choosing the right process node for a product is a cost, schedule, and ecosystem decision as much as it is a technical one, which is why "most advanced node" and "best node for this chip" are frequently different answers. A newer, denser node typically costs significantly more per wafer, has a less mature yield curve early in its life, and may have a thinner library of pre-qualified IP blocks and design tools available compared to an older, well-proven node. A chip that doesn't need the absolute latest transistor density — an analog-heavy design, a cost-sensitive consumer part, or anything where packaging and system-level integration matter more than raw logic density — often makes more sense built on a mature, well-characterized older node than on the newest available one, regardless of what the respective node names suggest about which is "better."