473 technical terms and definitions
critical dimension explained, cd semiconductor meaning, critical dimension lithography, what does cd mean in chip manufacturing
Critical dimension, often abbreviated CD, refers to the smallest, most precisely controlled feature size on a chip — typically the width of the narrowest transistor gate or wire…
cryogenic plasma etch explained, high aspect ratio sidewall control, low temperature etch semiconductor, tsv etch profile, gaa release etch sidewall bowing
Cryo etch is plasma etching performed with the wafer cooled to extremely low temperatures, and it exists to solve an etch-profile problem that ordinary room-temperature…
chemical vapor deposition explained, CVD vs ALD semiconductor, PECVD LPCVD thermal CVD, step coverage conformality, thin film deposition chip fabrication
Chemical Vapor Deposition (CVD) is how a fab builds material up on the wafer instead of carving it away. Where plasma etch removes everything outside the mask, CVD does…
dof lithography explained, depth of focus meaning chip, lithography focus tolerance, dof semiconductor
Depth of focus, or DOF, is the vertical range above and below a lithography system's ideal focal plane within which a pattern can still be exposed sharply enough to be usable…
all reduce explained, ring allreduce vs tree allreduce, gradient synchronization gpu cluster, collective communication ai training, training cluster interconnect bandwidth
Distributed training is how a single model gets trained across thousands of chips at once, and the mechanism that makes it work — collective communication, most commonly…
deep ultraviolet lithography explained, duv vs euv, duv lithography meaning, 193nm lithography
DUV, or deep ultraviolet lithography, is the workhorse lithography technology that patterned chips for decades before EUV arrived, using a longer wavelength of ultraviolet light…
edge ai explained, edge ai vs cloud ai, on-device ai meaning, what does edge ai mean
Edge AI means running artificial intelligence directly on the device where data is generated — a phone, a camera, a car, a factory sensor — instead of sending that data to…
euv lithography explained, extreme ultraviolet lithography meaning, how does euv work, euv chip manufacturing
EUV lithography is a chipmaking technique that uses extreme ultraviolet light — with a wavelength roughly fourteen times shorter than the light used in older lithography methods…
fabless company meaning, fabless vs idm, fabless semiconductor model, what does fabless mean
A fabless company designs chips but doesn't own or operate the factories that manufacture them, instead paying a foundry to fabricate its designs — a business model that lets…
federated learning explained, federated ai training meaning, federated learning privacy, what does federated learning do
Federated learning is a way of training AI models across many separate devices or locations without ever centralizing the underlying data — each device trains on its own local…
flip chip explained, flip chip vs wire bonding, flip chip bonding meaning, what does flip chip mean
Flip chip packaging is a method of connecting a silicon die to its package by flipping the die upside down and attaching it directly via an array of tiny solder bumps across its…
high k dielectric explained, gate leakage quantum tunneling, silicon dioxide gate insulator, transistor gate dielectric, gate oxide thickness scaling
Gate oxide is the thin insulating layer sitting directly between a transistor's gate and its channel, and its whole job is to let the gate control the channel electrically without…
hbm explained, hbm meaning ai chips, high bandwidth memory vs regular memory, what does hbm stand for
High bandwidth memory, or HBM, is a type of memory built by stacking multiple memory dies vertically and connecting them with extremely short, wide internal connections, achieving…
immersion lithography explained, water immersion lithography meaning, duv immersion, immersion lithography vs euv
Immersion lithography is a technique that places a thin layer of purified water between the lens and the wafer during DUV lithography, using water's optical properties to bend…
ion implantation explained, semiconductor doping process, boron phosphorus arsenic dopant, spike anneal activation, source drain junction implant
Ion implantation is how a fab actually changes silicon's electrical personality, not just its shape. Etch and CVD sculpt and build up physical structure, but neither one turns…
ler lithography explained, line edge roughness meaning, chip manufacturing edge roughness, what does ler mean
Line edge roughness, or LER, refers to the small, irregular waviness along the edges of a patterned feature on a chip — instead of a perfectly smooth, straight line, real…
prefill vs decode explained, kv cache transformer, roofline model ai accelerator, llm serving throughput latency, memory bandwidth bound inference
LLM inference is running an already-trained model forward to answer a live request, and it behaves nothing like training on the hardware underneath it. Training adjusts a model's…
semiconductor metrology explained, wafer inspection defect detection, CD-SEM overlay scatterometry, statistical process control fab, OCD critical dimension measurement
Metrology and inspection are how a fab knows whether the last 60 process steps actually worked, without waiting until the finished chip fails to find out. After nearly every…
mmwave explained, millimeter wave 5g meaning, mmwave vs sub-6, what does mmwave mean
Millimeter wave, often called mmWave, refers to a very high-frequency band of radio spectrum used by some 5G networks, offering dramatically more available bandwidth and faster…
mimo wireless explained, mimo meaning 5g, multiple input multiple output, what does mimo stand for
MIMO, short for multiple-input multiple-output, is a wireless technology that uses multiple antennas at both the transmitter and receiver to send and receive several data streams…
mixed precision training explained, ai training precision meaning, mixed precision ai model, what does mixed precision mean
Mixed precision training is a technique for training AI models that uses lower-precision numbers for most calculations to gain speed and memory savings, while selectively keeping…
moe llm architecture explained, sparse expert routing, moe vs dense model, expert router transformer, moe memory capacity accelerator
Mixture-of-experts (MoE) is an architecture where a model has far more total parameters than a comparably-sized dense model, but only activates a small fraction of them for any…
ai model distillation explained, knowledge distillation meaning, teacher student model ai, what does model distillation mean
Model distillation is a technique for training a smaller, faster "student" AI model to mimic the behavior of a larger, more capable "teacher" model, transferring much of…
model quantization explained, ai model quantization meaning, quantization neural network, why quantize ai models
Model quantization is a technique that shrinks an AI model by representing its internal numbers with less precision — for example, using 8-bit values instead of the 32-bit values…
moore's law explained, moores law meaning, is moores law dead, moores law transistor count
Moore's Law is the observation, made by Intel co-founder Gordon Moore in 1965, that the number of transistors that can be economically packed onto a chip roughly doubles every…
non-recurring engineering cost, chip nre explained, semiconductor nre meaning, nre vs per-unit cost
Non-recurring engineering cost, or NRE cost, refers to the one-time upfront expense of designing and preparing a chip for manufacturing — covering things like design work…
opc lithography explained, optical proximity correction meaning, computational lithography opc, what does opc mean in chip manufacturing
Optical proximity correction, or OPC, is a computational technique that deliberately distorts the pattern on a photomask in precise, calculated ways so that after light…
photoresist explained, photoresist lithography meaning, positive vs negative photoresist, how does photoresist work
Photoresist is a light-sensitive chemical coating applied to a silicon wafer before lithography, one that chemically changes when exposed to light so that, after development, it…
plasma etching explained, RIE vs ICP etch, anisotropic etch semiconductor, dry etch process chip fabrication, plasma etch selectivity endpoint
Plasma etch is how a chip factory carves the pattern from a photomask into the actual silicon, layer by layer. After lithography exposes a resist pattern on the wafer, that…
poly gate etch explained, gate critical dimension control, polysilicon gate fabrication, gate etch stop on oxide, transistor gate patterning
Polysilicon etch is the process step that carves polycrystalline silicon into precise gate shapes, and for decades it was the single most critical etch step in the entire fab…
int8 fp8 int4 explained, llm quantization accuracy tradeoff, weight only quantization, activation quantization inference, quantization memory bandwidth ai accelerator
Quantization is the practice of storing and computing a model's weights and activations in fewer bits than the 16 or 32 bits they were trained in, trading a small amount…
quantum computing explained, what is a qubit, quantum computing meaning, quantum vs classical computing
Quantum computing is a fundamentally different approach to computation that uses quantum bits, or "qubits," instead of the ordinary bits every classical chip relies on — where…
ram explained, ram vs storage, random access memory, how does ram work
RAM, or random access memory, is the fast, temporary workspace a computer uses to hold whatever it's actively working on — open programs, loaded data, the current state of a game…
what is RAG AI
Retrieval-augmented generation, or RAG, is a technique that combines a language model with an external search step, retrieving relevant documents or facts from an outside…
sti semiconductor explained, transistor isolation fab process, sti etch fill cmp, front end of line isolation, sti trench oxide fill
Shallow trench isolation (STI) is the structure that keeps neighboring transistors electrically separate, and it's one of the earliest steps in the front-end-of-line process that…
draft model verification llm, speculative sampling explained, llm decode throughput optimization, draft and verify inference, accelerated token generation
Speculative decoding is a way to generate multiple tokens per expensive decode step instead of just one, by letting a small, cheap "draft" model guess ahead and having the large…
wafer probe test explained, dicing singulation semiconductor, chip packaging types, CoWoS advanced packaging, HBM TSV stacking, known good die
Once the last metal layer is done, a finished wafer is still just a fragile glass-thin disc holding hundreds of identical, untested chips. Everything up to this point…
wire bonding explained, wire bonding vs flip chip, chip wire bonding meaning, what does wire bonding mean
Wire bonding is the traditional method of connecting a silicon die to its package by attaching extremely thin metal wires between connection pads on the die's edges…
semiconductor yield explained, wafer yield meaning, why yield matters, chip manufacturing yield
Yield is the percentage of chips on a wafer that come out good enough to sell, and it is the single number that decides more about a chip's real-world cost than almost anything…
whisker formation tin lead prediction, whisker formation tin, formation tin lead, tin lead prediction, whisker formation, formation tin, tin lead, lead prediction
Whisker Formation Tin Lead Prediction with Machine Learning Introduction & Motivation Whisker Formation Tin Lead Prediction with Machine Learning addresses a central problem…
whisker growth risk prediction, whisker growth risk, growth risk prediction, whisker growth, growth risk, risk prediction
Whisker Growth Risk Prediction with Machine Learning Introduction & Motivation Whisker Growth Risk Prediction with Machine Learning addresses a central problem in tin whisker…
white light interferometry calibration drift prediction machine learning, white light, interferometry calibration drift, white light interferometry
White Light Interferometry Calibration Drift Prediction with Machine Learning Introduction & Motivation White Light Interferometry Calibration Drift Prediction with Machine…
Whitespace and Padding Normalization Introduction & Motivation Whitespace and Padding Normalization addresses a central problem in {subject} assurance and {target} management: how…
code ai
Whole Function Generation is the AI task of generating a complete, correct function implementation given only a natural language docstring and function signature — the primary…
300mm vs 200mm wafer, why are wafers 300mm, wafer size explained, why did wafers get bigger, 450mm wafer, dies per wafer
Modern fabs process silicon in the shape of 300-millimeter round wafers, not because that size is fundamentally special, but because it is the point where a bigger circle stopped…
why does a cpu need a heat sink, chip cooling explained, why do processors get hot, chip overheating
A chip needs cooling because every single transistor switching on and off wastes a small amount of energy as heat, and a modern processor switches billions of transistors billions…
Wide and Deep Learning for Memorization and Generalization Introduction & Motivation Wide and Deep Learning for Memorization and Generalization addresses a central problem…
Causal Process Modeling for Wide-Bandgap Power Devices Causal Process Modeling for Wide-Bandgap Power Devices Introduction Causal Process Modeling for Wide-Bandgap Power Devices…
Edge AI Deployment for Wide-Bandgap Power Devices Edge AI Deployment for Wide-Bandgap Power Devices Introduction Edge AI Deployment for Wide-Bandgap Power Devices is…
Predictive Maintenance for Wide-Bandgap Power Devices Predictive Maintenance for Wide-Bandgap Power Devices Introduction Predictive Maintenance for Wide-Bandgap Power Devices is…