Sidewall Spacer
A sidewall spacer is a thin layer of insulating material formed along the vertical sides of a transistor's gate, used to precisely control where subsequent processing steps, like…
27,069 technical terms and definitions
A sidewall spacer is a thin layer of insulating material formed along the vertical sides of a transistor's gate, used to precisely control where subsequent processing steps, like…
A small cell is a low-power, compact wireless base station that covers a much smaller geographic area than a traditional cell tower, deployed in dense clusters to boost network…
A solder bump is a small ball or dome of solder deposited directly onto a chip's bond pad, used in flip-chip packaging to create both the electrical connection and the mechanical…
gate spacer fabrication, self aligned source drain, anisotropic etch spacer formation, conformal deposition spacer, transistor spacer width
A spacer is a thin sidewall of insulating material formed against the edges of a transistor's gate, and it exists to precisely control where the source and drain regions begin…
Sub-resolution assist features, or SRAF, are extra shapes added to a photomask that are deliberately too small to print onto the wafer themselves, but which subtly reshape…
A standard cell is a small, pre-designed and pre-verified circuit block, such as a basic logic gate, that chip designers assemble by the thousands or millions from a shared…
soc explained, system on chip meaning, what does soc mean in phones, soc vs cpu
A system on chip, or SoC, is a single chip that combines multiple major components of a computing system — typically a processor, memory controller, graphics, and other…
systolic array explained, systolic array tpu, systolic array meaning ai, what does systolic array mean
A systolic array is a grid-like arrangement of simple processing units that pass data to their immediate neighbors in a steady, rhythmic pattern, allowing an AI accelerator…
chip tape out explained, tape out meaning semiconductor, what does tape out mean, chip design tape out
Tape-out is the moment a chip's design is finalized and sent off to a foundry for manufacturing — the point of no return in chip development, after which making changes means…
tsv explained, through silicon via meaning, tsv chip packaging, what does tsv stand for
A through-silicon via, or TSV, is a microscopic vertical electrical connection drilled directly through a piece of silicon, allowing signals to pass straight up and down between…
tensor processing unit explained, tpu vs gpu, tpu meaning ai chip, what does tpu stand for
A TPU, or Tensor Processing Unit, is a type of AI accelerator chip designed specifically to speed up the tensor math — large-scale multi-dimensional array operations — that…
transistor explained, how does a transistor work, transistor switch, cmos transistor basics
A transistor is a tiny electronic switch that can flip between "on" and "off" billions of times per second, and it is the single building block that every modern chip is made…
turbo pump semiconductor fab, high vacuum pump explained, staged vacuum pump down, plasma chamber vacuum requirements, molecular flow vacuum pump
A turbomolecular pump is the workhorse vacuum pump that gets a process chamber down to the extremely low pressures nearly every fab process covered in this series actually…
A vector database is a specialized database designed to store and quickly search numerical vector representations of data, called embeddings, enabling similarity-based search that…
vector processing explained, vector processor vs scalar, simd vector processor meaning, what does a vector processor do
A vector processor is a type of processor built to apply the same single operation to many data elements at once, rather than processing one value at a time — a design well suited…
A voltage-controlled oscillator is a circuit that generates an oscillating output signal whose frequency changes in response to an input control voltage, making it a core building…
silicon wafer explained, semiconductor wafer meaning, wafer fabrication, what is a die vs wafer
A wafer is a thin, round slice of ultra-pure silicon — typically about 300 millimeters across on modern production lines — that serves as the base material on which an entire…
what is WAT semiconductor
A wafer acceptance test, or WAT, is a standardized set of electrical measurements taken on special test structures scattered across a wafer to confirm the underlying fabrication…
fab exhaust treatment, thermal abatement vs catalytic, hazardous process gas treatment, wet scrubbing vs abatement, greenhouse gas fab exhaust
Abatement is the treatment of a fab's process exhaust before it ever leaves the facility, and it exists because nearly every reactive chemical process covered throughout this…
subtractive interconnect process, aluminum vs copper interconnect, chlorine plasma etch aluminum, metal wiring fabrication, aluminum etch profile
Aluminum metal etch is the process step that patterns aluminum wiring into the precise interconnect shapes a chip design calls for, and it represents an older interconnect…
ai accelerator chip explained, ai accelerator vs gpu, ai accelerator meaning, types of ai accelerators
An AI accelerator is any chip built specifically to speed up the math behind artificial intelligence — mostly large-scale matrix multiplication — rather than to handle…
An alignment mark is a small reference fiducial pattern etched onto a wafer during an early process step, used by a lithography scanner to precisely position each subsequent…
integrated device manufacturer meaning, idm vs fabless, idm semiconductor company, what does idm mean in chips
An IDM, or Integrated Device Manufacturer, is a chip company that both designs its chips and manufactures them in its own fabrication plants — the opposite of the fabless model…
An interposer is an intermediate layer placed between one or more chip dies and the package substrate, providing dense, short interconnects that let multiple separate dies…
npu explained, neural processing unit, npu vs gpu vs cpu, on-device ai chip
An NPU, or Neural Processing Unit, is a chip or chip block built specifically to run the repetitive math behind neural networks — mostly large batches of matrix multiplication…
osat semiconductor meaning, outsourced assembly and test explained, osat vs foundry, chip packaging and testing company
An OSAT — short for Outsourced Semiconductor Assembly and Test — is a company that specializes in packaging finished silicon dies and testing completed chips, handling…
Atomic layer deposition, or ALD, is a thin-film deposition technique that builds up material one atomic layer at a time through a sequence of self-limiting chemical reactions…
transformer attention explained, query key value attention, kv cache explained, multi query attention, grouped query attention, self attention transformer
The attention mechanism is the calculation that lets a transformer decide, for every token it's producing, which earlier tokens actually matter right now — and it's exactly what…
what is BEOL
Back-end-of-line, or BEOL, refers to the later stage of chip fabrication where the metal wiring layers connecting all the transistors together are built up on top of the wafer…
Backside power delivery is a chip design approach that moves the power distribution network from the front side of the wafer, where signal wiring lives, to the back side, freeing…
beamforming explained, beamforming 5g meaning, how does beamforming work, beamforming antenna array
Beamforming is a wireless antenna technique that combines signals from multiple antenna elements so they reinforce each other in a specific direction, effectively focusing…
Branch prediction is a processor technique that guesses which way a program's conditional branch will go before that branch is actually evaluated, letting the processor keep…
what is burn in testing
Burn-in testing is a reliability screening step where chips are operated under elevated temperature and voltage stress for an extended period before shipment, deliberately…
Cache coherence is the property that guarantees every processor core in a multi-core chip sees a consistent, up-to-date view of shared memory, even though each core keeps its own…
A cache hierarchy is a layered arrangement of multiple cache memory levels between a processor and main memory, each successive level trading some speed for greater capacity…
Carrier aggregation is a wireless technology that combines multiple separate frequency bands, or carriers, into one effective connection, letting a device use more total bandwidth…
Chemical mechanical polishing, or CMP, is a process that combines a chemical slurry with mechanical grinding to precisely flatten a wafer's surface between processing steps…
Chemical vapor deposition, or CVD, is a thin-film deposition technique where gaseous chemical precursors react at a wafer's surface to form a solid material layer, offering faster…
chip packaging explained, semiconductor packaging meaning, advanced packaging chiplets, what is a chip package
Chip packaging is the process of taking a finished, tested silicon die and encasing it in a protective housing with external connectors — the familiar black rectangle with metal…
Clock domain crossing is the transfer of a signal from a circuit block running on one clock to a circuit block running on a different, asynchronous clock, a situation that…
clock speed explained, cpu ghz meaning, what is clock frequency, clock speed vs performance
Clock speed, measured in gigahertz (GHz), is how many times per second a chip's internal clock ticks, and each tick synchronizes one step of work across the chip's circuits — but…
chemical mechanical polishing explained, planarization semiconductor, cmp dishing erosion, copper damascene cmp, preston equation polishing
Chemical-Mechanical Polishing (CMP) is what flattens the wafer back out after deposition and etch leave it bumpy. Every layer built through the CVD-lithography-etch loop leaves…
compute in memory explained, in memory computing ai, compute in memory chip meaning, what does compute in memory mean
Compute-in-memory is a chip architecture approach that performs certain calculations directly inside memory itself, rather than following the traditional design of moving data out…
Contact resistance is the electrical resistance that occurs specifically at the interface between two different materials, such as a metal contact and a transistor's source…
dynamic batching llm serving, in-flight batching explained, llm throughput scheduling, static vs continuous batching, ai serving scheduler
Continuous batching is the serving-system technique that decides which requests actually get processed together on any given decode step, and it's the layer where every…
damascene process explained, dual damascene semiconductor, copper electroplating BEOL, barrier metal liner copper, low-k dielectric interconnect
Copper interconnect is the wiring that connects millions or billions of individual transistors into an actual working circuit. Once the transistors themselves are built through…
cpu cache explained, l1 l2 l3 cache, how does cache memory work, cache hit miss
CPU cache is a small amount of extremely fast memory built directly into the processor to hide an enormous speed gap: a modern CPU can perform an operation in a fraction of…
critical dimension explained, cd semiconductor meaning, critical dimension lithography, what does cd mean in chip manufacturing
Critical dimension, often abbreviated CD, refers to the smallest, most precisely controlled feature size on a chip — typically the width of the narrowest transistor gate or wire…
cryogenic plasma etch explained, high aspect ratio sidewall control, low temperature etch semiconductor, tsv etch profile, gaa release etch sidewall bowing
Cryo etch is plasma etching performed with the wafer cooled to extremely low temperatures, and it exists to solve an etch-profile problem that ordinary room-temperature…
chemical vapor deposition explained, CVD vs ALD semiconductor, PECVD LPCVD thermal CVD, step coverage conformality, thin film deposition chip fabrication
Chemical Vapor Deposition (CVD) is how a fab builds material up on the wafer instead of carving it away. Where plasma etch removes everything outside the mask, CVD does…