What Is a Network on Chip
A network on chip, or NoC, is a communication system built directly into a chip that routes data between its many internal components — cores, memory, and other blocks — using…
3,533 technical terms and definitions
A network on chip, or NoC, is a communication system built directly into a chip that routes data between its many internal components — cores, memory, and other blocks — using…
process design kit, pdk explained, process design kit explained, what is a process design kit, pdk semiconductor, foundry pdk
A PDK, or process design kit, is the file package a foundry hands its customers so their chip designs actually work on that foundry's silicon: transistor models, standard-cell…
photomask explained, lithography mask meaning, how does a photomask work, euv photomask
A photomask is a precisely patterned plate — usually a sheet of quartz coated with an opaque chrome pattern — that lithography equipment uses like a stencil to project a chip's…
power management ic explained, pmic chip meaning, what does a pmic do, power management integrated circuit
A power management IC, or PMIC, is a dedicated chip responsible for taking a device's raw input power — such as a battery or wall adapter — and converting, regulating…
rdl chip packaging, rdl explained, what does rdl mean semiconductor, redistribution layer packaging
A redistribution layer, or RDL, is a thin layer of extra wiring built on top of a finished chip that reroutes its native connection points to new, more convenient locations…
wet scrubbing exhaust treatment, scrubber column design, gas absorption liquid treatment, acid gas neutralization fab, counterflow scrubber
A scrubber is the specific abatement technology that removes hazardous gases from process exhaust by passing them through a liquid — usually water, sometimes with added chemicals…
semiconductor explained, semiconductor definition, semiconductor vs conductor vs insulator, what is silicon used for
A semiconductor is a material — most commonly silicon — whose ability to conduct electricity sits between that of a true conductor (like copper) and a true insulator (like glass)…
chip ip core explained, ip licensing semiconductor meaning, what is ip core in chip design, processor ip licensing
A semiconductor IP core is a pre-designed, reusable block of chip circuitry — such as a processor core, a memory controller, or a communications interface — that a chip designer…
gate spacer fabrication, self aligned source drain, anisotropic etch spacer formation, conformal deposition spacer, transistor spacer width
A spacer is a thin sidewall of insulating material formed against the edges of a transistor's gate, and it exists to precisely control where the source and drain regions begin…
soc explained, system on chip meaning, what does soc mean in phones, soc vs cpu
A system on chip, or SoC, is a single chip that combines multiple major components of a computing system — typically a processor, memory controller, graphics, and other…
chip tape out explained, tape out meaning semiconductor, what does tape out mean, chip design tape out
Tape-out is the moment a chip's design is finalized and sent off to a foundry for manufacturing — the point of no return in chip development, after which making changes means…
tsv explained, through silicon via meaning, tsv chip packaging, what does tsv stand for
A through-silicon via, or TSV, is a microscopic vertical electrical connection drilled directly through a piece of silicon, allowing signals to pass straight up and down between…
tensor processing unit explained, tpu vs gpu, tpu meaning ai chip, what does tpu stand for
A TPU, or Tensor Processing Unit, is a type of AI accelerator chip designed specifically to speed up the tensor math — large-scale multi-dimensional array operations — that…
turbo pump semiconductor fab, high vacuum pump explained, staged vacuum pump down, plasma chamber vacuum requirements, molecular flow vacuum pump
A turbomolecular pump is the workhorse vacuum pump that gets a process chamber down to the extremely low pressures nearly every fab process covered in this series actually…
silicon wafer explained, semiconductor wafer meaning, wafer fabrication, what is a die vs wafer
A wafer is a thin, round slice of ultra-pure silicon — typically about 300 millimeters across on modern production lines — that serves as the base material on which an entire…
what is WAT semiconductor
A wafer acceptance test, or WAT, is a standardized set of electrical measurements taken on special test structures scattered across a wafer to confirm the underlying fabrication…
fab exhaust treatment, thermal abatement vs catalytic, hazardous process gas treatment, wet scrubbing vs abatement, greenhouse gas fab exhaust
Abatement is the treatment of a fab's process exhaust before it ever leaves the facility, and it exists because nearly every reactive chemical process covered throughout this…
subtractive interconnect process, aluminum vs copper interconnect, chlorine plasma etch aluminum, metal wiring fabrication, aluminum etch profile
Aluminum metal etch is the process step that patterns aluminum wiring into the precise interconnect shapes a chip design calls for, and it represents an older interconnect…
ai accelerator chip explained, ai accelerator vs gpu, ai accelerator meaning, types of ai accelerators
An AI accelerator is any chip built specifically to speed up the math behind artificial intelligence — mostly large-scale matrix multiplication — rather than to handle…
integrated device manufacturer meaning, idm vs fabless, idm semiconductor company, what does idm mean in chips
An IDM, or Integrated Device Manufacturer, is a chip company that both designs its chips and manufactures them in its own fabrication plants — the opposite of the fabless model…
npu explained, neural processing unit, npu vs gpu vs cpu, on-device ai chip
An NPU, or Neural Processing Unit, is a chip or chip block built specifically to run the repetitive math behind neural networks — mostly large batches of matrix multiplication…
osat semiconductor meaning, outsourced assembly and test explained, osat vs foundry, chip packaging and testing company
An OSAT — short for Outsourced Semiconductor Assembly and Test — is a company that specializes in packaging finished silicon dies and testing completed chips, handling…
Atomic layer deposition, or ALD, is a thin-film deposition technique that builds up material one atomic layer at a time through a sequence of self-limiting chemical reactions…
Chemical vapor deposition, or CVD, is a thin-film deposition technique where gaseous chemical precursors react at a wafer's surface to form a solid material layer, offering faster…
chip packaging explained, semiconductor packaging meaning, advanced packaging chiplets, what is a chip package
Chip packaging is the process of taking a finished, tested silicon die and encasing it in a protective housing with external connectors — the familiar black rectangle with metal…
chemical mechanical polishing explained, planarization semiconductor, cmp dishing erosion, copper damascene cmp, preston equation polishing
Chemical-Mechanical Polishing (CMP) is what flattens the wafer back out after deposition and etch leave it bumpy. Every layer built through the CVD-lithography-etch loop leaves…
compute in memory explained, in memory computing ai, compute in memory chip meaning, what does compute in memory mean
Compute-in-memory is a chip architecture approach that performs certain calculations directly inside memory itself, rather than following the traditional design of moving data out…
damascene process explained, dual damascene semiconductor, copper electroplating BEOL, barrier metal liner copper, low-k dielectric interconnect
Copper interconnect is the wiring that connects millions or billions of individual transistors into an actual working circuit. Once the transistors themselves are built through…
critical dimension explained, cd semiconductor meaning, critical dimension lithography, what does cd mean in chip manufacturing
Critical dimension, often abbreviated CD, refers to the smallest, most precisely controlled feature size on a chip — typically the width of the narrowest transistor gate or wire…
cryogenic plasma etch explained, high aspect ratio sidewall control, low temperature etch semiconductor, tsv etch profile, gaa release etch sidewall bowing
Cryo etch is plasma etching performed with the wafer cooled to extremely low temperatures, and it exists to solve an etch-profile problem that ordinary room-temperature…
chemical vapor deposition explained, CVD vs ALD semiconductor, PECVD LPCVD thermal CVD, step coverage conformality, thin film deposition chip fabrication
Chemical Vapor Deposition (CVD) is how a fab builds material up on the wafer instead of carving it away. Where plasma etch removes everything outside the mask, CVD does…
dof lithography explained, depth of focus meaning chip, lithography focus tolerance, dof semiconductor
Depth of focus, or DOF, is the vertical range above and below a lithography system's ideal focal plane within which a pattern can still be exposed sharply enough to be usable…
deep ultraviolet lithography explained, duv vs euv, duv lithography meaning, 193nm lithography
DUV, or deep ultraviolet lithography, is the workhorse lithography technology that patterned chips for decades before EUV arrived, using a longer wavelength of ultraviolet light…
euv lithography explained, extreme ultraviolet lithography meaning, how does euv work, euv chip manufacturing
EUV lithography is a chipmaking technique that uses extreme ultraviolet light — with a wavelength roughly fourteen times shorter than the light used in older lithography methods…
fabless company meaning, fabless vs idm, fabless semiconductor model, what does fabless mean
A fabless company designs chips but doesn't own or operate the factories that manufacture them, instead paying a foundry to fabricate its designs — a business model that lets…
Fan-out wafer-level packaging, or FOWLP, is a chip packaging method that embeds individual dies in a reconstituted mold compound and builds redistribution wiring extending beyond…
flip chip explained, flip chip vs wire bonding, flip chip bonding meaning, what does flip chip mean
Flip chip packaging is a method of connecting a silicon die to its package by flipping the die upside down and attaching it directly via an array of tiny solder bumps across its…
hbm explained, hbm meaning ai chips, high bandwidth memory vs regular memory, what does hbm stand for
High bandwidth memory, or HBM, is a type of memory built by stacking multiple memory dies vertically and connecting them with extremely short, wide internal connections, achieving…
immersion lithography explained, water immersion lithography meaning, duv immersion, immersion lithography vs euv
Immersion lithography is a technique that places a thin layer of purified water between the lens and the wafer during DUV lithography, using water's optical properties to bend…
ion implantation explained, semiconductor doping process, boron phosphorus arsenic dopant, spike anneal activation, source drain junction implant
Ion implantation is how a fab actually changes silicon's electrical personality, not just its shape. Etch and CVD sculpt and build up physical structure, but neither one turns…
ler lithography explained, line edge roughness meaning, chip manufacturing edge roughness, what does ler mean
Line edge roughness, or LER, refers to the small, irregular waviness along the edges of a patterned feature on a chip — instead of a perfectly smooth, straight line, real…
semiconductor metrology explained, wafer inspection defect detection, CD-SEM overlay scatterometry, statistical process control fab, OCD critical dimension measurement
Metrology and inspection are how a fab knows whether the last 60 process steps actually worked, without waiting until the finished chip fails to find out. After nearly every…
non-recurring engineering cost, chip nre explained, semiconductor nre meaning, nre vs per-unit cost
Non-recurring engineering cost, or NRE cost, refers to the one-time upfront expense of designing and preparing a chip for manufacturing — covering things like design work…
opc lithography explained, optical proximity correction meaning, computational lithography opc, what does opc mean in chip manufacturing
Optical proximity correction, or OPC, is a computational technique that deliberately distorts the pattern on a photomask in precise, calculated ways so that after light…
photoresist explained, photoresist lithography meaning, positive vs negative photoresist, how does photoresist work
Photoresist is a light-sensitive chemical coating applied to a silicon wafer before lithography, one that chemically changes when exposed to light so that, after development, it…
plasma etching explained, RIE vs ICP etch, anisotropic etch semiconductor, dry etch process chip fabrication, plasma etch selectivity endpoint
Plasma etch is how a chip factory carves the pattern from a photomask into the actual silicon, layer by layer. After lithography exposes a resist pattern on the wafer, that…
Plasma etching is a fabrication process that uses a chemically reactive, ionized gas to remove material from a wafer's surface in a controlled pattern, enabling the fine…
poly gate etch explained, gate critical dimension control, polysilicon gate fabrication, gate etch stop on oxide, transistor gate patterning
Polysilicon etch is the process step that carves polycrystalline silicon into precise gate shapes, and for decades it was the single most critical etch step in the entire fab…
sti semiconductor explained, transistor isolation fab process, sti etch fill cmp, front end of line isolation, sti trench oxide fill
Shallow trench isolation (STI) is the structure that keeps neighboring transistors electrically separate, and it's one of the earliest steps in the front-end-of-line process that…
universal chiplet interconnect express, die to die interconnect standard, chiplet interoperability standard, ucie physical layer protocol layer, pcie cxl chiplet
UCIe (Universal Chiplet Interconnect Express) is the standardized protocol that lets chiplets from different vendors, built on different process nodes, actually talk to each other…